Sessionless SoC Test Scheduling With Frequency Scaling
نویسندگان
چکیده
Reducing test cost by minimizing the overall test time is one of the main goals of System-on-Chip (SoC) test scheduling. Power-aware strategies optimize the overall test time of a test schedule for a global peak power budget. For powerconstrained test scheduling with multiple test clock frequencies, a fast heuristic method for sessionless test scheduling is proposed. Experiments on several ITC’02 benchmarks show that a test time reduction of 10-20% over optimized conventional session-based test scheduling is possible.
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تاریخ انتشار 2013